Iqra

Electronics Engineering

AQL Tech Solutions • Temps partiel

Jan 2024 - Present • 2 yrs 6 mos

I have two years of professional experience working with Verilog on FPGA platforms. My role involves designing, implementing, and verifying digital logic using Verilog HDL, synthesizing designs for target FPGAs, and performing timing closure and resource optimization. I develop and simulate modules (state machines, datapaths, FIFOs, memory interfaces), integrate IP cores, and create testbenches with directed and self-checking stimuli. I also work with toolflows for synthesis and place-and-route (e.g., Xilinx Vivado, Intel Quartus), perform board bring-up, debug on hardware using logic analyzers and on-chip debugging (ILA/JTAG), and iterate to meet performance, area, and power constraints. I collaborate with system engineers to meet interface and timing requirements and document designs and verification results.