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muhammad_daud10

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@muhammad_daud10

Making digital design and verification easier

Pakistan
Anglais
Certaines informations sont présentées en anglais.
À propos de moi
Gained hands-on experience verifying complex IPs, including AHB-Transaction Generator which transaction to transaction management unit (TMU) and UltraEthernet semantic layer components, through comprehensive testbench development, stimulus generation, and functional coverage closure using UVM and SystemVerilog... Plus d’infos

Compétences

m
muhammad_daud10
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Voir mes services

Systèmes intégrés & IoT
I will do dld, verilog, systemverilog, riscv and uvm verification
Systèmes intégrés & IoT
I will implement, debug and verify amba protocols ahb, apb and axi and spi, uart

Expérience professionnelle

Digital Design Verifcation

Impare` • Temps plein

Apr 2025 - Dec 20258 mos

I am a Digital Design and Verification Engineer with hands-on experience in designing and verifying IPs such as UART and AXI-based models. I have worked on verification of AHB Transaction Generators and the Ultra Ethernet Transport Layer using SystemVerilog and UVM, focusing on functional correctness, protocol compliance, and coverage-driven verification.