Parcourir les catégories
Explorer
Fiverr Pro
Français
$
USD
Parth
@parth292000
FPGA RTL Engineer Verilog VHDL Testbench Debugging C Cpp Python
Inde
Anglais
À propos de moi
I am a Master’s graduate in Integrated Circuits and Systems with hands-on experience in FPGA and digital design. I work with Verilog, VHDL, C, C++, and Python to build and debug reliable solutions. I can design RTL modules, write testbenches, fix simulation issues, and develop clean, synthesizable code. I focus on clear communication, practical solutions, and on-time delivery. Feel free to message me to discuss your project.
Compétences
Parth
hors ligne •
Temps de réponse moyen de 1 heure
Voir mes services
Systèmes intégrés & IoT
I will design and debug verilog or vhdl rtl with testbench
